| 摘要: |
| 本文在分析已有的Turbo码译码算法的基础上提出了TD-SCDMA终端系统384kbpsTurbo码译码器的实现结构和方法,并通过FPGA进行硬件实现,给出了实现的资源占用和译码性能,证明该实现方法具有很高的经济意义和实用意义。 |
| 关键词: 终端系统 Turbo码 译码器 |
| DOI：10.3969/j.issn.1001-893X. |
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| 基金项目:国家高技术研究发展计划(863计划) |
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| Implementation of a 384 kbps Turbo Decoder in User Equipment System of TD-SCDMA |
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| Abstract: |
| On the basis of analysis of the algorithm of Turbo code, this paper brings forward the implementation structure and method of a 384 kbps Turbo decoder in the mobile terminal system of TD-SCDMA, realizes it with FPGA, and offers the resource consumed and the performance of the decoder, which proves the way of implementation is of very high economic value and practical value. |
| Key words: TD-SCDMA SW MIN-LOG MAP |
