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一种采用改良基-26算法的低复杂度高吞吐量FFT处理器设计
于建
0
(河北民族师范学院 物理与电子工程学院,河北 承德 067000)
摘要:
面向无线个人局域网应用设计了一种高吞吐量、低复杂度的2 048点快速傅里叶变换处理器。提出了新型改良基-26算法用于降低硬件实现复杂度,采用多路径负反馈架构来提高数据吞吐量。为了减少硬件成本,采取正则有符号数常数乘法器替代布斯乘法器完成除旋转因子W2048外所有旋转因子的复数乘法运算。另外,采用了一种减少存储旋转因子W2048系数只读存储器空间的方法,将其存储空间减少为原来的一半。基于QUARTUS PRIME平台的仿真结果显示,工作频率为320 MHz时,最高数据吞吐速率达到了2.6 Gsample/s,而且对比以往的研究方案至少可节约逻辑单元使用量23%,记忆体单元使用量12%。
关键词:  无线个局域网(WPAN)  快速傅里叶变换处理器  多路径延迟负反馈(MDF)架构  改良基-26算法
DOI:
基金项目:河北省自然科学基金项目(F2020101001) ;河北省引进留学人员资助项目(C20210301) ;河北省承德市科学技术研究与发展计划项目(202001B014) ;河北省承德市高新区汇智领创空间项目(HZLC2021015)
Design of a low-complexity and high-throughput FFT processor by using modified radix-26 algorithm
YU Jian
(School of Physics and Electronic Engineering,Hebei Normal University for Nationalities,Chengde 067000,China)
Abstract:
A high-throughput low-complexity 2 048-point fast Fourier transform(FFT) processor is designed for wireless personal area network(WPAN) applications.A novel modified radix-26 algorithm is proposed for reducing the hardware complexity,and multi-path delay feedback(MDF) architecture is adopted for high data throughput.For less hardware-cost,it also uses canonical signed digit(CSD) constant multiplier instead of Booth multiplier to achieve thecomplex multiplications of twiddle factors except W2048.In addition,a reduction method of read-only memory(ROM) for storing the coefficients of twiddle factor W2048 is adopted,which can halve the ROM size.The simulation result based on QUARTUS PRIME shows that the highest throughput rate is up to 2.6 Gsample/s at 320 MHz.Furthermore,the proposed scheme can reduce at least 23% logic elements and 12% memory bits compared with previous schemes.
Key words:  wireless personal area network(WPAN)  FFT processor  multi-path delay feedback(MDF) architecture  modified radix-2 6 algorithm