| 摘要: |
| 传统片上系统（System on Chip，SoC）启动方案中通常采用ROM（Read-Only Memory）或Flash等非易失性存储器来存储程序并引导内核启动，但是ROM在制造之后不能更改数据内容；Flash等可擦写存储器则需要专用的擦写接口，且制造费用高昂。针对以上问题，设计了SoC启动控制器和引导加载程序，通过读取片外Micro SD（Secure Digital）卡中存储的程序，提出了一种直接从片内SRAM（Static Random Access Memory）中启动SoC的新型方案，从速度、面积和成本等方面折中考虑，给出了设计过程并进行验证分析。结果表明，所设计的SoC启动控制器完成数据加载并直接从SRAM引导SoC启动。该方案采用SMIC 0.13 μm CMOS 1P6M工艺流片验证测试，在800 ms内将64 kB数据加载到片上SRAM并成功引导SoC启动，系统工作频率32 MHz，SoC面积为2 mm2，其中启动控制器面积仅为0.3 mm2。相比于传统片内ROM/Flash启动方式和片外Flash加载方式，所提方案无需使用片内ROM或Flash IP核，面积减少了20%，IO管脚减少了6个，为SoC提供了一种新型的低成本启动方案。 |
| 关键词: 片上系统 启动控制器 片外SD卡 Cortex-M0 |
| DOI： |
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| 基金项目:国家自然科学基金资助项目(61361011)；广西自然科学基金项目(2017GXNSFAA198363) |
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| Design and Implementation of a New SoC Startup Solution |
| LI Lin,SONG Shuxiang |
| (School of Electronic Engineering,Guangxi Normal University,Guilin 541004,China) |
| Abstract: |
| Traditional system on chip（SoC） booting schemes typically use non-volatile memory such as read-only memory（ROM） or Flash to store programs and boot the kernel.However,the ROM cannot change the data content after manufacturing;a rewritable memory such as Flash requires a dedicated erase interface,and the manufacturing cost is high.To solve above problems,this paper designs the SoC boot controller and boot loader.By reading the program stored in the off-chip Micro SD card,a new scheme for starting SoC directly from the on-chip static random access memory(SRAM) is proposed,which is divided in terms of speed,area and cost.In the consideration,the design process is given and the verification analysis is carried out.The results show that the designed SoC boot controller completes the data loading and boots the SoC directly from the SRAM.The solution uses SMIC 0.13 μm CMOS 1P6M process chip verification test,64 kB data is loaded into the on-chip SRAM within 800 ms and the SoC is successfully booted.The system operating frequency is 32 MHz,the SoC area is 2 mm2,and the boot controller area is only 0.3 mm2.Compared with the traditional on-chip ROM / Flash boot method and off-chip Flash loading method,this solution does not require the use of on-chip ROM or Flash IP cores,reduces the area and the number of IO pins by 20% and 6,respectively,which provides a new low-cost startup solution for SoCs. |
| Key words: SoC boot loader off-chip SD Cortex-M0 |
