| 摘要: |
| 锁相环环路带宽值的选取对于锁相环的跟踪误差性能有重要影响。基于全球卫星导航系统(GNSS）接收机中常用锁相环结构与数学模型，首先介绍了锁相环及其重要组成部分环路滤波器的结构和原理，然后分析了环路带宽的取值对锁相环两个最重要的误差源——环路热噪声误差和晶振阿伦偏差的影响，给出了低动态下使锁相环总的跟踪误差最小的最佳环路带宽的理论表达式。对基于由现场可编程门阵列（FPGA）芯片、温补晶振和模/数接口电路构建的实际硬件接收机平台进行了验证,结果表明：当根据最佳环路带宽的理论表达式取环路带宽值时，锁相环的跟踪误差最小。所推得的理论表达式不仅可以应用于GNSS接收机，也适用于一般的载波跟踪环设计。 |
| 关键词: GNSS接收机 锁相环 环路滤波器 最优环路带宽 |
| DOI： |
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| 基金项目:中国科学院科技创新重点部署项目(KGFZD-125-14-005-2)；中国科学院国家天文台青年人才基金项目 |
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| Selection of optimal loop bandwidth value in PLL of GNSS receiver |
| ZHANG Jie,MA Guanyi |
| () |
| Abstract: |
| The bandwidth value of phase-locked loop(PLL) plays an important role in determining the tracking error performance of PLL. Firstly,the structure and principle of PLL and its important component—loop filter are introduced based on normal PLL structure and mathematical model of Global Navigation Satellite System(GNSS) receiver. And then the effects of loop bandwidth value on two most important error sources of PLL(PLL loop thermal noise and Allen variance of the oscillator) are analyzed. The theoretical expression of the optimal loop bandwidth value to minimize the total PLL tracking error in low dynamic conditions is proposed. And it is verified on the practical hardware receiver platform composed of Field-Programmable Gate Array(FPGA) chip,Temperature Compensate Xtal Oscillator(TCXO) and A/D interface circuits. The results show that PLL tracking error is minimal at the value according to the proposed theoretical expression of the optimal loop bandwidth. The theoretical expression can be applied to both GNSS receiver and normal carrier tracking loop design. |
| Key words: GNSS receiver phase-locked loop loop filter optimal loop bandwidth |
