| 摘要: |
| 针对某型导弹多总线地面测试设备传输数据量大、传输速度高的要求，设计了一种基
于乒乓操作的SDRAM控制器作为测试设备数据缓存器。详细介绍了以FPGA为主控器的设计方
案，包括SDRAM内部接口设计、数据传输过程以及乒乓操作的实现方法。通过图像发生装置
将图像数据发送给测试总线，对控制器功能进行验证，数据读写速率稳定达到125 Mbit/s，
证明本控制器具有良好的性能，能够满足多总线地面测试设备的需求。 |
| 关键词: 地面测试设备 多总线 SDRAM控制器 乒乓操作 |
| DOI： |
|
| 基金项目: |
|
| Design of Double SDRAM Controller for Multibus Ground based Test Equipment |
| LIU Yan-fei,YANG Tie-qian,LI Qi,NI Liang |
| (The Second Artillery Engineering College，Xi′an 710025,China) |
| Abstract: |
| A double SDRAM controller based on ping pong operation
as the data buffer is designed to meet the requirement of large data amount and
high
transmission speed for multibus ground-based test equipment of a missil
e system. The design scheme which uses FPGA as the main controller is presented
i
n detail，including the internal interface of SDRAM, process of data transmissio
n and realization of ping-pong operation. The function of this controller is val
idated through the picked images from image generator,and the result shows that
it can write and read dat
a at the steady rate of 125Mbit/s,which indicates this SDRAM controller is
feasible for the multibus ground-based test equipment. |
| Key words: ground-based test equipment multibus SDRAM controller ping-pong operation |
