| 摘要: |
| 介绍一种C频段频率合成器的设计与实现。通过采用多锁相环路合成方式，实现了小步进、低杂散、低相噪频率输出，并且分析了与其它频率合成器设计方法的不同，指出各自的优缺点。给出了实现的技术指标。 |
| 关键词: 频率合成器 锁相环 直接数字合成 设计 |
| DOI：10.3969/j.issn.1001-893X. |
| Received:October 26, 2005Revised:March 06, 2006 |
| 基金项目: |
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| Design and Implementation of a C-Band Frequency Synthesizer |
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| () |
| Abstract: |
| A C - band frequency synthesizer is presented. Multiple loop VCO/PLL design approach is used to realize small step -size, high spectrum purity and low phase noise. Finally the test results are given. |
| Key words: frequency synthesizer PLL DDS design |
