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引用本文：

黄润龙.高度综合总线技术硬件平台设计[J].电讯技术，2011，51（6）： - . [点击复制]
HUANG Run-long.Hardware Platform Design Based on Highly integrated Bus Technology[J].，2011，51（6）： - . [点击复制]

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高度综合总线技术硬件平台设计
黄润龙
0 字体:加大+\|默认\|缩小-
(（中国西南电子技术研究所，成都 610036）)

摘要:

为了满足高度综合化机架间和机架内LRM之间大容量数据通信和高速与低速总线之间数据交互通信需求，集成高速总线FC、RapidIO、PCI和低速总线CAN、RS485、LVDS电平同步串行总线以及M-LVDS电平同步串行总线，设计了高度综合的总线技术硬件平台，满足了机架间640 Mbit/s有效数据带宽需求、机架内LRM之间1 024 Mbit/s有效数据带宽需求以及机架内部低速总线与高速总线交互需求，其综合化和通用化的设计理念以及总线传输技术的高带宽、低延迟的高性能特性，对各个电子通信系统领域具有重要的借鉴意义。

关键词: 综合化航空电子光纤通道低速总线高速总线硬件平台现场可更换模块

DOI：

基金项目:

Hardware Platform Design Based on Highly integrated Bus Technology

HUANG Run-long

((Southwest China Institute of Electronic Technology, Chengdu 610036,China))

Abstract:

To meet the high capability data communication and data exchange communication requirements between outside highly-integrated rackmounts and insige rackmou nt LRM,a highly-integrated bus hardware platform is designed.The hardware platform int egrates high speed FC bus,RapidIO bus and PCI bus and low speed CAN bus,RS485 bu s,LVDS level synchronization serial bus and M-LVDS level synchronization serial bus.It satisfies 640Mbit/s effective data rate need between outside highly-integ rated r ackmounts,1024Mbit/s effective data rate in inside rackmount LRM and exchang e need between low speed bus and high speed bus in inside rackmount.The integrat ive and standard design idea and high speed,low delay bus transfer design method provide reference for electronic communication system application field.

Key words: integrated avionics fibre channel low speed bus high speed bus hardware platform LRM