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引用本文：

陈昌勇,张良俊,杨媛,等.一种基于FPGA的多面阵雷达时序控制器设计[J].电讯技术，2022，（7）： - . [点击复制]
CHEN Changyong,ZHANG Liangjun,YANG Yuan,et al.Design of timing controller for multifaceted phased array radar based on FPGA[J].，2022，（7）： - . [点击复制]

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一种基于FPGA的多面阵雷达时序控制器设计
陈昌勇,张良俊,杨媛,刘文佳,叶舟,冯正康
0 字体:加大+\|默认\|缩小-
(上海航天电子技术研究所，上海 201109)

摘要:

多面阵雷达是一种利用多个两维相扫阵面协同工作的相控阵雷达，具有复杂的时序控制需求。针对该需求，提出了一种时序控制器设计方案。该方案利用现场可编程门阵列(Field Programmable Gate Array,,FPGA)的灵活性和时序准确性，结合参数化设计，实现了Peripheral Component Interconnect express(PCIe)总线接口、通用异步收发器(Universal Asynchronous Receiver/Transmitter,UART)接口、时序产生等功能，很好地保证了复杂时序的统一调度。实际工程应用表明，该时序控制器设计合理，具有良好的稳定性和可测试性。

关键词: 多面阵雷达反无人机雷达时序控制

DOI：

基金项目:

Design of timing controller for multifaceted phased array radar based on FPGA

CHEN Changyong,ZHANG Liangjun,YANG Yuan,LIU Wenjia,YE Zhou,FENG Zhengkang

(Shanghai Aerospace Electronic Technology Institute,Shanghai 201109,China)

Abstract:

Multifaceted phased array radar uses multiple two-dimensional phase scanning arrays to work together and it has complex requirements for timing control.In order to solve this problem,a design scheme of timing controller is proposed.This solution utilizes the flexibility and timing accuracy of field programmable gate array(FPGA) and parameterized design to realize functions such as peripheral component interconnect express(PCIe) bus interface,universal asynchronous receiver/transmitter(UART) interface,timing generation,etc.,and well guarantees the unified scheduling of complex timing.Practical engineering applications show that the design of the timing controller is reasonable and it has good stability and testability.

Key words: multifaceted phased array radar anti-UAV radar timing control