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引用本文：

黄润龙.基于FPGA的高速同步串行总线设计[J].电讯技术，2008，48（11）： - . [点击复制]
.Design of High Speed Synchronous Serial Bus Based on FPGA[J].，2008，48（11）： - . [点击复制]

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基于FPGA的高速同步串行总线设计

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摘要:

为了实现高速同步串行总线设计,提出了基于FPGA使用硬件描述语言实现同步串行总线通信的方法,同时在工程应用中验证了其高速率和高可靠性的总线传输特性,为提高SRU(场内可更换单元)级之间总线速率提供参考。

关键词: 数据传输,FPGA,同步串行总线,LVDS,高级数据链路控制规程,硬件描述语言

DOI：

基金项目:

Design of High Speed Synchronous Serial Bus Based on FPGA

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Abstract:

In order to realize the design of high speed synchronous serial bus,the method for synchronous serial bus communications based on FPGA by hardware description language is proposed.At the same time,the high speed and high reliable bus transportation characteristics are verified in application of project,which can provide important reference for improving the speed of bus in SRU.

Key words: data transmission,FPGA,synchronous serial bus,LVDS,HDLC,HDL